This invention relates generally to sigma-delta (SD) modulators and, more specifically, to SD modulators used in analog-to-digital converter circuitry and that employ a dither signal to improve their performance.
SD modulators used in analog-to-digital converters (ADCS) are well known in the art. Reference may be had, by example, to S. R. Norsworthy et al., xe2x80x9cDelta-Sigma Data Convertersxe2x80x9d, IEEE Press, NY, 1997, and to J. G. Proakis et al., Digital Signal Processingxe2x80x9d Third Edition, Prentice-Hall, 1996.
Conventional SD modulators are known to suffer from the generation of tones, i.e., undesirable signals that manifest themselves as periodic fluctuations, the amplitude and frequency of which are a function of the amplitude and frequency of the input signal. A conventional technique to overcome this problem is to use a dither signal that is added to the input signal. Reference in this regard can be had to U.S. Pat. No.: 5,889,482, xe2x80x9cAnalog-to-Digital Converter Using Dither and Method for Converting Analog Signals to Digital Signalsxe2x80x9d, by M. Zarubinsky et al. The approach of Zarubinsky et al. is to add in the dither signal in the SD modulator, and to then cancel or suppress the dither signal before it reaches the output terminal of the ADC. This technique is said to preserve a high signal-to-noise ratio (SNR) and to provide low spectral tones in the output signal. If the input signal to the converter has a small amplitude, then the signal at the output of sigma-delta modulator is highly correlated with the dither signal D. If the input signal is close to the maximum admissible amplitude, the modulator partially suppresses the dither signal, and the output signal remains substantially without non-linear distortions.
FIG. 4B of Zarubinsky et al. shows the dither signal D, which can be a multi-level signal with different magnitudes between maximum and minimum values. The magnitude of the dither signal is expressed as BD, which remains constant over one time interval, and where a step index n various randomly.
A disadvantage of the use of the dither signal, in particular one with a constant amplitude, is that the maximum allowable input signal at the input to the SD modulator is reduced as the probability is increased of overloading the quantizer. The end result is a reduction in the dynamic range of the ADC.
A need exists to provide an improved sigma-delta modulator and a dither signal, in particular a switched capacitor (SC) SD modulator, as well as a continuous time SD modulator, where the use of the dither signal does not have an adverse effect on the dynamic range of the ADC, and where the dither signal is generated in a simple manner that makes efficient use of integrated circuit area and that operates with a small power consumption.
It is a first object and advantage of this invention to provide an improved sigmadelta modulator.
It is a further object and advantage of this invention to provide an improved sigma-delta modulator that does not suffer from a significant reduction in dynamic range due to the use of a dither signal.
The foregoing and other problems are overcome and the foregoing objects and advantages are realized by methods and apparatus in accordance with embodiments of this invention.
The teachings of this invention provide embodiments of low complexity, single-bit SD modulators that employ a dither signal having an amplitude that is a function of the amplitude of the input signal to the SD modulator. The teachings of this invention apply as well to multi-bit SD modulators. In these embodiments pseudorandom noise is added to a SD modulator quantizer as a dither current signal, and the amplitude of pseudorandom noise is controlled in such a manner as to be inversely proportional to the amplitude of the input signal, i.e., the amplitude of the dither current signal is smallest when the amplitude of the input signal is largest and vice versa.
In the presently preferred embodiments a plurality of linear feedback shift registers (LFSRS) are used to generate a pseudorandom code sequence that in turn is used to control the output current of simple current steering digital-to-analog converters (DACs), or simple MOS current sources forming a DAC . The output current from a plurality of these DACs is summed to an internal node of the quantizer of the SD modulator.
In a first embodiment of this invention the instantaneous amplitude of the input signal is quantized with a plurality (e.g., two or three) of low complexity window detectors operating in parallel. The bank of window detectors controls the DACs in such a manner that the greater is the absolute value of the input signal the fewer DACs are enabled for operation, and vice versa. In this embodiment the value of the dither signal is pseudorandom, as it is controlled by the LFSRs, and the maximum amplitude of the dither signal is one of a plurality of discrete values, as it is controlled by the bank of window detectors.
In a second embodiment the amplitude of the input signal is squared and subtracted from a constant value, and the difference is used to control the output current of the current steering DACs. In this embodiment the value of the dither signal is again pseudorandom, as it is controlled by the LFSRs, but the maximum amplitude of the dither signal may assume any value within a predetermined continuous range of values, as it is controlled by the squaring-subtracting circuitry.
In both of these embodiments the presence of the dither signal reduces the undesirable tones in the output signal when the tones are most disturbing (i.e., when the input signal is absent or at a low level), while not degrading the performance of the SD modulator when the input signal amplitude is large.
As the dither signal is random or pseudorandom in nature in both of the disclosed embodiments, circuitry that is both simple and inherently inaccurate can be used in the implementation, thereby reducing the required integrated circuit area, circuit complexity and cost, as well as power consumption. These are important considerations when the SD converter, and an ADC, are used in mass produced, battery operated consumer goods, such as handheld cellular telephones and personal communicators.
A method is disclosed to operate a sigma-delta modulator of a type that includes a loop filter followed by a quantizer, as is a sigma-delta modulator that operates in accordance with the method. The method includes steps of (a) sampling an amplitude of an input signal to the loop filter; and (b) generating a dither current signal for summation with a quantizer current signal, where the dither current signal is generated to have a pseudorandom amplitude that is modulated so as to be inversely proportional to the sampled amplitude of the input signal.
The step of generating operates at least one linear feedback shift register to control the on and off states of a plurality of current steering DACs or simple current sources and, hence, the amplitude of the dither current signal, and may further select a polarity of the dither current signal. Also disclosed are techniques for shaping a spectrum of the dither current signal so as to reduce in-band noise.
The step of sampling samples the input signal out of phase with a sampling of the input signal by the sigma-delta modulator.
In one embodiment the step of sampling operates a plurality of window detectors in parallel, and the dither current signal is amplitude modulated in a plurality of predetermined quantized steps that are a function of the number of window detectors.
In another embodiment the step of sampling generates a current with a value that represents a square of the magnitude of the sampled input signal, subtracts the current from a reference current to obtain a difference current, and amplitude modulates the dither current signal using the difference current.